Linux 内核网络栈深度实战：从 Ring Buffer 到 XDP/eBPF 的全链路剖析

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\u5728 Linux \u670d\u52a1\u5668\u7684\u4e16\u754c\u91cc\uff0c\u7f51\u7edc\u6027\u80fd\u6c38\u8fdc\u662f\u6838\u5fc3\u8bdd\u9898\u3002\u65e0\u8bba\u662f\u652f\u6491\u767e\u4e07\u5e76\u53d1\u7684\u7f51\u5173\u3001\u4f4e\u5ef6\u8fdf\u7684\u6570\u636e\u5e93\u670d\u52a1\uff0c\u8fd8\u662f\u9ad8\u541e\u5410\u7684\u6570\u636e\u5e73\u9762\uff0c\u7406\u89e3\u6570\u636e\u5305\u4ece\u7f51\u5361\u62b5\u8fbe\u7684\u90a3\u4e00\u523b\u5230\u5e94\u7528\u7a0b\u5e8f\u5b8c\u6210\u8bfb\u53d6\u4e4b\u95f4\u6240\u7ecf\u5386\u7684\u5b8c\u6574\u94fe\u8def\uff0c\u662f\u6bcf\u4e00\u4f4d\u7cfb\u7edf\u5de5\u7a0b\u5e08\u548c\u57fa\u7840\u67b6\u6784\u5f00\u53d1\u8005\u5fc5\u987b\u638c\u63e1\u7684\u5e95\u5c42\u529f\u529b\u3002\u8fd9\u6761\u770b\u4f3c\u7b80\u5355\u7684\"\u6570\u636e\u4e4b\u65c5\"\uff0c\u7a7f\u8d8a\u4e86 DMA Ring Buffer\u3001NAPI \u8f6e\u8be2\u3001\u534f\u8bae\u6808\u5206\u5c42\u89e3\u6790\u3001Netfilter \u94a9\u5b50\u3001Socket \u7f13\u51b2\u533a\u3001epoll \u4e8b\u4ef6\u9a71\u52a8\u3001\u96f6\u62f7\u8d1d\u52a0\u901f\uff0c\u76f4\u81f3\u6700\u65b0\u7684 io_uring \u5f02\u6b65 I/O \u548c XDP \u5185\u6838\u65c1\u8def\u3002

\u672c\u6587\u5c06\u4ee5\u4e00\u9897\u4ee5\u592a\u7f51\u5e27\u7684\u751f\u547d\u5468\u671f\u4e3a\u4e3b\u7ebf\uff0c\u81ea\u9876\u800c\u4e0b\u6df1\u5ea6\u5256\u6790 Linux \u7f51\u7edc\u6808\u7684\u6bcf\u4e00\u5c42\u673a\u5236\uff0c\u5e76\u63a2\u8ba8\u5982\u4f55\u901a\u8fc7\u96f6\u62f7\u8d1d\u3001io_uring\u3001XDP \u7b49\u6280\u672f\u7a81\u7834\u4f20\u7edf\u7f51\u7edc I/O \u7684\u6027\u80fd\u74f6\u9888\u3002

\u7b2c\u4e00\u7ad9\uff1a\u7f51\u5361\u4e0e DMA Ring Buffer \u2014\u2014 \u6570\u636e\u7684\u7269\u7406\u5165\u53e3

\u5f53\u4e00\u6839\u7f51\u7ebf\u4f20\u6765\u7535\u4fe1\u53f7\u65f6\uff0c\u7f51\u5361\uff08NIC\uff09\u7684 PHY \u82af\u7247\u9996\u5148\u5c06\u5176\u89e3\u7801\u4e3a\u6570\u5b57\u4fe1\u53f7\uff0c\u7136\u540e\u901a\u8fc7 PCIe \u603b\u7ebf\u4e0a\u7684 DMA\uff08Direct Memory Access\uff09\u5f15\u64ce\uff0c\u76f4\u63a5\u5c06\u6570\u636e\u5e27\u5199\u5165\u5185\u6838\u9884\u5148\u5206\u914d\u5185\u5b58\u4e2d\u7684 Ring Buffer\uff08\u73af\u5f62\u7f13\u51b2\u533a\uff09\u3002\u8fd9\u4e00\u8fc7\u7a0b\u5b8c\u5168\u4e0d\u9700\u8981 CPU \u53c2\u4e0e\uff0c\u662f\u786c\u4ef6\u5c42\u9762\u7684\u96f6 CPU \u5f00\u9500\u6570\u636e\u4f20\u8f93\u3002

Ring Buffer \u672c\u8d28\u4e0a\u662f\u4e00\u4e2a\u7531\u56fa\u5b9a\u5927\u5c0f\u63cf\u8ff0\u7b26\uff08descriptor\uff09\u7ec4\u6210\u7684\u73af\u5f62\u961f\u5217\uff0c\u6bcf\u4e2a\u63cf\u8ff0\u7b26\u5305\u542b\u4e00\u4e2a\u6307\u5411 sk_buff \u6570\u636e\u533a\u7684\u7269\u7406\u5730\u5740\u3001\u957f\u5ea6\u548c\u72b6\u6001\u5b57\u6bb5\u3002\u4ee5 Intel ixgbe \u9a71\u52a8\u4e3a\u4f8b\uff1a

// \u7b80\u5316\u7684 Ring Buffer \u7ed3\u6784\nstruct ixgbe_ring {\n    struct ixgbe_hw *hw;\n    struct ixgbe_rx_buffer *rx_buffer_info;  // \u63a5\u6536\u7f13\u51b2\u533a\u4fe1\u606f\u6570\u7ec4\n    union ixgbe_adv_rx_desc *desc;           // \u63cf\u8ff0\u7b26\u73af\u5f62\u961f\u5217\uff08DMA \u53ef\u8bbf\u95ee\uff09\n    unsigned int count;                       // \u63cf\u8ff0\u7b26\u6570\u91cf\uff08\u901a\u5e38 256/512/1024\uff09\n    unsigned int next_to_use;\n    unsigned int next_to_clean;\n};

\u5f53 DMA \u5199\u5165\u5b8c\u6210\u540e\uff0c\u7f51\u5361\u4f1a\u5728\u63cf\u8ff0\u7b26\u4e2d\u8bbe\u7f6e DD\uff08Descriptor Done\uff09 \u4f4d\u5e76\u89e6\u53d1 MSI-X \u4e2d\u65ad\uff08\u5982\u679c\u542f\u7528\u4e86 Interrupt Coalescing\uff0c\u5219\u5ef6\u8fdf\u89e6\u53d1\uff09\u3002\u6b64\u65f6\u6570\u636e\u5305\u5df2\u7ecf\u8eba\u5728\u5185\u6838\u5185\u5b58\u4e2d\uff0c\u7b49\u5f85 CPU \u7684\u5904\u7406\u3002

\u5173\u952e\u4f18\u5316\uff1a\u591a\u961f\u5217\u4e0e RSS

\u73b0\u4ee3\u7f51\u5361\u652f\u6301\u591a\u53d1\u9001/\u63a5\u6536\u961f\u5217\uff08multi-queue\uff09\uff0c\u901a\u8fc7 RSS\uff08Receive Side Scaling\uff09\u786c\u4ef6\u54c8\u5e0c\u5c06\u4e0d\u540c\u4e94\u5143\u7ec4\uff08\u6e90 IP\u3001\u76ee\u7684 IP\u3001\u6e90\u7aef\u53e3\u3001\u76ee\u7684\u7aef\u53e3\u3001\u534f\u8bae\uff09\u7684\u6570\u636e\u6d41\u5206\u914d\u5230\u4e0d\u540c\u961f\u5217\uff0c\u6bcf\u4e2a\u961f\u5217\u7ed1\u5b9a\u4e00\u4e2a CPU \u6838\u5fc3\uff0c\u4ece\u800c\u5b9e\u73b0\u7ebf\u6027\u6269\u5c55\u3002ethtool -L eth0 combined 8 \u53ef\u4ee5\u914d\u7f6e\u961f\u5217\u6570\u91cf\u3002

\u7b2c\u4e8c\u7ad9\uff1a\u786c\u4e2d\u65ad\u4e0e\u8f6f\u4e2d\u65ad \u2014\u2014 \u4e2d\u65ad\u7684\u51cf\u8d1f\u827a\u672f

\u6570\u636e\u5305\u5230\u8fbe\u540e\u4ea7\u751f\u7684\u786c\u4ef6\u4e2d\u65ad\uff08Hard IRQ\uff09\u662f CPU \u6700\"\u6602\u8d35\"\u7684\u64cd\u4f5c\u4e4b\u4e00\u2014\u2014\u5b83\u610f\u5473\u7740\u6d41\u6c34\u7ebf\u5237\u65b0\u3001\u4e0a\u4e0b\u6587\u5207\u6362\u548c\u7f13\u5b58\u5931\u6548\u3002\u5728\u4e07\u5146\u7f51\u7edc\u73af\u5883\u4e0b\uff0c64 \u5b57\u8282\u5c0f\u5305\u7684\u7406\u8bba\u7ebf\u901f\u53ef\u8fbe 14.88 Mpps\uff0c\u5982\u679c\u6bcf\u4e2a\u5305\u90fd\u89e6\u53d1\u4e00\u6b21\u786c\u4e2d\u65ad\uff0cCPU \u5c06\u5b8c\u5168\u88ab\u4e2d\u65ad\u98ce\u66b4\u6df9\u6ca1\u3002

Hard IRQ \u7684\u5904\u7406\u54f2\u5b66\uff1a\u6700\u5c0f\u5316

\u786c\u4e2d\u65ad\u5904\u7406\u7a0b\u5e8f\uff08ixgbe_msix_clean_rings\uff09\u552f\u4e00\u505a\u7684\u4e8b\u60c5\u5c31\u662f\u7981\u7528\u8be5 CPU \u7684\u4e2d\u65ad\uff0c\u7136\u540e\u89e6\u53d1 NAPI \u8f6f\u4e2d\u65ad\uff1a

// ixgbe \u4e2d\u65ad\u5904\u7406\u6838\u5fc3\u903b\u8f91\uff08\u7b80\u5316\uff09\nstatic irqreturn_t ixgbe_msix_clean_rings(int irq, void *data) {\n    struct q_vector *q_vector = data;\n    // \u5173\u95ed\u4e2d\u65ad\uff0c\u8fdb\u5165 NAPI \u8f6e\u8be2\u6a21\u5f0f\n    napi_schedule(